The present invention relates to electrostatic discharge (ESD) protection devices and methods for forming the same, and in particular, to monolithically formed ESD protection devices and methods of forming the same.
Integrated circuits (ICs) employing field effect devices, such as for example, Metal-Oxide Semiconductor Field Effect Transistors (MOSFETs), have a history of susceptibility to electrostatic discharge (ESD). Given the decreasing size of circuit features and the improvements constantly being made in process technology ESD has become an important concern for IC manufacturers. Static electricity generated by daily activity alone can destroy or substantially harm many field effect circuits. The circuits most susceptible to damage are usually finished circuits which have been packaged, but not yet installed into a finished product. Once installed, other means can protect the chip from damage.
An electrostatic discharge typically occurs when a circuit is touched by an individual handling the circuit before installation; when a static discharge occurs as the packaged circuit slides on its pins across another surface; or more generally, whenever the circuit is exposed to static electricity.
U.S. Pat. No. 5,239,440 to Merrill discloses a circuit for providing ESD protection, which is incorporated herein by reference. The circuit includes a triggering portion 24 and a clamping portion 26 (See FIG. 1). The triggering portion 24 controls the clamping portion 26, so that the power supply voltage (Vcc) is shunted to ground whenever and electrostatic discharge xe2x80x98eventxe2x80x99 occurs. The triggering portion 24 includes a resistor 34 and a capacitor 36 which set a time constant for the triggering portion 24. The time constant controls the periods when the clamping portion 26 of the circuit is activated.
However, the triggering portion 24 of the Merrill circuit is described as a discrete component circuit which is disposed in proximity to the integrated circuit to be protected. The addition of discrete components to an IC adds significantly to the size of the IC, and since smaller size is almost always desirable, the addition of such components decreases the commercial viability of such an IC.
Therefore, there is currently a need for an ESD protection circuit which is formed monolithically in the surface of the integrated circuit to be protected.
The present invention is a semiconductor device comprising a silicon-on-insulator substrate including a base substrate, an insulator layer, and a silicon layer, a trench capacitor including at least one trench formed in the silicon-on-insulator substrate and extending through the silicon layer and the insulator layer to the base substrate, and a resistive element formed in the silicon-on-insulator substrate.
The above and other advantages and features of the present invention will be better understood from the following detailed description of the preferred embodiments of the invention which is provided in connection with the accompanying drawings.